Recently, during his keynote speech at COMPUTEX Taipei, Marvell CEO Matt Murphy presented a viewpoint that has drawn significant attention across the industry: “The future of AI scaling depends on connectivity.” 
He argued that the primary bottleneck in AI infrastructure is gradually shifting from compute and memory to connectivity. In other words, connectivity is emerging as the next major challenge in AI infrastructure.
Bottleneck: From Compute to Connectivity
As AI training and inference clusters continue to scale, individual AI systems have evolved from hundreds of processors working together to tens of thousands operating as a unified system. Looking ahead, hyperscale AI clusters may eventually consist of hundreds of thousands – or even millions – of interconnected processors.
In such architectures, overall system efficiency is no longer determined solely by the performance of individual chips, but increasingly by the efficiency of data movement between processors.
Traditional copper interconnects are approaching their physical limits. Meanwhile, optical connectivity is extending beyond data center backbone networks and moving deeper into the system – into racks, servers, chip-to-chip links, and package-level interconnects.
Copper Is Approaching Its Physical Limits
During his presentation, Matt Murphy introduced the concept of the “Copper Wall.” As lane speeds continue to increase, the effective transmission distance supported by copper links continues to shrink. When systems move toward 200G/lane, 400G/lane, and beyond, copper faces increasing challenges in signal loss, power consumption, and reach.
As a result, a growing portion of connectivity that has traditionally relied on copper will gradually transition to optical interconnects.
Murphy also highlighted an important industry implication: every time the copper wall moves outward, optical connectivity demand increases by at least an order of magnitude, potentially driving 10x growth in optical connectivity demand.
NVIDIA founder and CEO Jensen Huang echoed a similar perspective: “Optics where you must, copper where you can.” Copper will continue to play an important role over the next five to ten years, particularly in short-reach applications. At the same time, the deployment footprint and strategic importance of optical interconnects will continue to expand.
Historically, optical communications have primarily served networking applications, including Data Center Interconnect (DCI), switch-to-switch connectivity, server-to-switch connectivity.
Going forward, optical technologies are expected to move deeper into computing architectures, enabling: GPU-to-GPU interconnects, GPU-to-memory connectivity, chip-to-chip communications, package-to-package optical links. Optical connectivity is no longer limited to traditional networking environments. It is increasingly becoming an integral component of next-generation computing architectures.
This trend is one of the key reasons why the industry continues to focus on technologies such as Co-Packaged Optics (CPO), Optical I/O (OIO), Advanced Optical Packaging. These technologies are accelerating the transition of optical interconnects from the networking layer toward the compute layer.
Murphy also emphasized that CPO is rapidly evolving from a future technology into a commercially viable technology. As switch ASIC bandwidth scales from 51.2T to 102.4T and eventually 204.8T, traditional pluggable optical modules face increasing challenges related to power consumption, front-panel density, and signal integrity. Bringing optical engines closer to the switch ASIC has become a critical approach for improving system efficiency – and this is the fundamental value proposition behind CPO.
HYC: Passive Optical Solutions for Next-Generation AI Interconnects
To address the industry’s demand for higher bandwidth, lower power consumption, and larger-scale connectivity, HYC continues to invest in key technologies and product platforms for next-generation optical connectivity.
For 800G, 1.6T, and future higher-speed optical interconnect architectures, HYC provides MPO/MTP assemblies, MMC/SN-MT (VSFF) assemblies, and high-density fiber cabling solutions.
To support emerging CPO architectures, HYC offers a comprehensive portfolio of passive optical components, including high precision pitch PMF+SMF hybrid FAUs, prism and MLA (Micro Lens Array) subassemblies, fiber shuffle, etc.
For next-generation connectivity, HYC is actively advancing its Multicore Fiber (MCF) portfolio, covering MCF fan-in/fan-out (FIFO), MCF patch cords, MCF FAUs, MCF Hybrid subassemblies.
From multicore fiber passive components and CPO-related subassemblies to ultra-high-density cabling systems, HYC remains focused on the evolving needs of AI and high-performance computing systems, providing a reliable, scalable, and future-ready optical connectivity foundation.
The AI industry is transitioning from a focus on improving individual chip performance to enhancing system-level collaboration and scalability. When tens of thousands – or even hundreds of thousands – of processors must operate as a single computing engine, connectivity becomes just as critical as compute performance itself.
From copper to optics, from networking to computing, and from data center interconnects to chip-level communications, optical technologies are becoming a foundational pillar of next-generation AI infrastructure.
The future of AI will not be defined by compute alone – it will be defined by connectivity. Optical interconnects are poised to become one of the key driving forces behind this transformation.
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